DOI:10.20894/IJWT. Periodicity: Bi Annual. Impact Factor: SJIF:4.78 & GIF:0.428 Submission:Any Time Publisher: IIR Groups Language: English Review Process: Double Blinded
C. Albrecht, "Iwls 2005benchmarks", Workshop for Logic Synthesis (IWLS) ,2005 View Artical
H. Asadi and M. B. Tahoori, "Analytical techniques for soft error rate modeling and mitigation of FPGA-based designs", IEEE Trans. Very Large Scale Integr ,Vol.15 ,2007 View Artical
C. Beckhoff, D. Koch, and J. Torresen, "The xilinx design language (xdl): Tutorial and use cases", IEEE Int.Workshop Reconfigurable Commu.-Centric Sy View Artical
F. Benz, A. Seffrin, and S. A. Huss, "Bil: A tool-chain for bitstream reverse-engineering ,2012 View Artical
A. Canis, J. Choi, M. Aldham, V. Zhang, A. Kammoona,J. H. Anderson, S. Brown, and T. Czajkowski, "Legup:High-level synthesis for fpga-based processor/accelerator systems ,2011 View Artical
R. S. Chakraborty, S. Narasimhan, and S. Bhunia, "Hardware trojan: Threats and emerging solutions", Proc. IEEE Int. High Level Design Validation Test ,2009 View Artical
R. Chakraborty, I. Saha, A. Palchaudhuri, and G. Naik, "Hardware trojan insertion by direct modification of fpga configuration bitstream ,Vol.30 ,2013 View Artical
S. Drimer, "Security for Volatile FPGAs", University of Cambridge, Computer Laboratory, Rapp ,2009 View Artical
R. Karri, J. Rajendran, K. Rosenfeld, and M. Tehranipoor, "Trustworthy hardware: Identifying and classifying hardware trojans", Computer ,2010 View Artical
A. Moradi, A. Barenghi, T. Kasper, and C. Paar, "On the vulnerability of fpga bitstream encryption against power analysis attacks: Extracting keys fr", Proc. 18th ACM Conf. Comput.Commun. Security ,2011 View Artical
J.-B. Note and E. Rannaud,, "From the bitstream to the netlist ,Vol.8 ,2008 View Artical
M. Potkonjak, "Synthesis of trustable ics using untrusted cad tools ,2010 View Artical
J. Rilling, D. Graziano, J. Hitchcock, T. Meyer, X. Wang, P. Jones, and J. Zambreno, "Circumventing a ring oscillator approach to fpga-based hardware trojan detection ,2011 View Artical
H. Salmani and M. Tehranipoor, "Analyzing circuit vulnerability to hardware trojan insertion at the behavioral level ,2013 View Artical
M. Tehranipoor and F. Koushanfar, "A survey of hardware trojan taxonomy and detection", IEEE Des ,Vol.27 ,2010 View Artical
K. Xiao and M. Tehranipoor, "Bisa: Built-in self-authentication for preventing hardware trojan insertion", IEEE HOST ,2013 View Artical
User Guide, Xilinx, "Virtex-II platform FPGA User Guide ,2005 View Artical
Data Sheet, Xilinx, "Virtex-II Platform FPGAs: Complete Data Sheet ,2007 View Artical
J. X. Zheng, E. Chen, and M. Potkonjak, "A benign hardware trojan on fpga-based embedded systems ,2012 View Artical
M. Attig and J. Lockwood, "A Framework for Rule Processing in Reconfigurable Network Systems", IEEE Symposium on Field-Programmable Custom Comput ,2005 View Artical
M. Attig and J. Lockwood, "SIFT: Snort Intrusion Filter for TCP", IEEE Symposium on High Speed Interconnects ,2005 View Artical
Z. K. Baker and V. K. Prassanna, "A Computationally Efficient Engine for Flexible Intrusion Detection", IEEE transactions on very large scale integration ,Vol.13 ,2005 View Artical
R. Bejtlich., "Extrusion Detection: Security Monitoring for Internal Intrusions", Addison Wesley ,2006 View Artical
B. Bloom., "Space/Time Trade-offs in Hash Coding with Allowable Errors", Communications of the ACM ,1970 View Artical
S. Dharmapurikar, P. Krishnamurthy, T. Sproull, J. Lockwood, "Deep Packet Inspection using Parallel Bloom Filters Bloom Filters : A Tutorial", Analysis, and Survey by James Blustein and Amal El View Artical
J. W. Lockwood, N. Naufel, J. S. Turner, and D. E. Taylor, "Reprogrammable Network PacketProcessing on the Field Programmable Port Extender (FPX)", International Symposium on Field Programmable Gate ,2001 View Artical
M. Mitzenmacher, "Compressed Bloom Filters", IEEE/ACM transactions on networking ,Vol.10 ,2002 View Artical
M.V. Ramakrishna, "A Simple Perfect Hashing Method for Static Sets", Proceedings of the Fourth International Conference ,1992 View Artical
H. Song and J. Lockwood, "Multi-pattern Signature Matching for Hardware Network Intrusion Detection Systems", IEEE Globecom ,2005 View Artical
C. Albrecht, "Iwls 2005benchmarks", Workshop for Logic Synthesis (IWLS) ,Vol. ,2005 View Artical
H. Asadi and M. B. Tahoori, "Analytical techniques for soft error rate modeling and mitigation of FPGA-based designs", IEEE Trans. Very Large Scale Integr ,Vol.15 ,Issue 12 ,2007 View Artical
C. Beckhoff, D. Koch, and J. Torresen, "The xilinx design language (xdl): Tutorial and use cases", IEEE Int.Workshop Reconfigurable Commu.-Centric Sy ,Vol. ,2008 View Artical
F. Benz, A. Seffrin, and S. A. Huss, "Bil: A tool-chain for bitstream reverse-engineering", Field Programmable Logic and Applications (FPL) ,Vol. ,Issue ,2012 View Artical
A. Canis, J. Choi, M. Aldham, V. Zhang, A. Kammoona,J. H. Anderson, S. Brown, and T. Czajkowski, "Legup:High-level synthesis for fpga-based processor/accelerator systems", Proceedings of the 19th ACM/SIGDA international sy ,Vol. ,2011 View Artical
R. S. Chakraborty, S. Narasimhan, and S. Bhunia, "Hardware trojan: Threats and emerging solutions", Proc. IEEE Int. High Level Design Validation Test ,Vol. ,2009 View Artical
R. Chakraborty, I. Saha, A. Palchaudhuri, and G. Naik, "Hardware trojan insertion by direct modification of fpga configuration bitstream", IEEE Design & Test ,Vol.30 ,Issue 2 ,2013 View Artical
S. Drimer, "Security for Volatile FPGAs", University of Cambridge, Computer Laboratory, Rapp ,Vol. ,2009 View Artical
R. Karri, J. Rajendran, K. Rosenfeld, and M. Tehranipoor, "Trustworthy hardware: Identifying and classifying hardware trojans", Computer ,Vol.43 ,Issue 10 ,2010 View Artical
A. Moradi, A. Barenghi, T. Kasper, and C. Paar, "On the vulnerability of fpga bitstream encryption against power analysis attacks", Proc. 18th ACM Conf. Comput.Commun. Security ,Vol. ,2011 View Artical
J.-B. Note and E. Rannaud,, "From the bitstream to the netlist", Proceedings of the 16th international ACM/SIGDA sy ,Vol.8 ,2008 View Artical
M. Potkonjak, "Synthesis of trustable ics using untrusted cad tools", Design Automation Conference (DAC) ,Vol. ,2010 View Artical
J. Rilling, D. Graziano, J. Hitchcock, T. Meyer, X. Wang, P. Jones, and J. Zambreno, "Circumventing a ring oscillator approach to fpga-based hardware trojan detection", Design Automation Conference (DAC) ,Vol. ,2011 View Artical
H. Salmani and M. Tehranipoor, "Analyzing circuit vulnerability to hardware trojan insertion at the behavioral level", Computer Design (ICCD) ,Vol.10 ,2013 View Artical
M. Tehranipoor and F. Koushanfar, "A survey of hardware trojan taxonomy and detection", IEEE Des ,Vol.45 ,Issue 5 ,2010 View Artical
K. Xiao and M. Tehranipoor, "Bisa: Built-in self-authentication for preventing hardware trojan insertion", IEEE HOST ,2013 View Artical
Data Sheet, Xilinx, "Virtex-II Platform FPGAs: Complete Data Sheet ,2007 View Artical
J. X. Zheng, E. Chen, and M. Potkonjak, "A benign hardware trojan on fpga-based embedded systems", Field Programmable Logic and Applications (FPL) ,Vol.47 ,Issue 6 ,2012 View Artical
M. Attig and J. Lockwood, "A Framework for Rule Processing in Reconfigurable Network Systems", IEEE Symposium on Field-Programmable Custom Comput ,Vol. ,2005 View Artical
M. Attig and J. Lockwood, "SIFT: Snort Intrusion Filter for TCP", IEEE Symposium on High Speed Interconnects ,Vol.13 ,Issue 7 ,2005 View Artical
Z. K. Baker and V. K. Prassanna, "A Computationally Efficient Engine for Flexible Intrusion Detection", IEEE transactions on very large scale integration ,Vol.13 ,Issue 10 ,2005 View Artical
B. Bloom., "Space/Time Trade-offs in Hash Coding with Allowable Errors", Communications of the ACM ,Vol.13 ,Issue 7 ,1970 View Artical
S. Dharmapurikar, P. Krishnamurthy, T. Sproull, J. Lockwood, "Deep Packet Inspection using Parallel Bloom Filters Bloom Filters : A Tutorial", Analysis, and Survey by James Blustein and Amal El ,Vol.13 ,Issue 7 View Artical
J. W. Lockwood, N. Naufel, J. S. Turner, and D. E. Taylor, "Reprogrammable Network PacketProcessing on the Field Programmable Port Extender (FPX)", International Symposium on Field Programmable Gate ,Vol. ,2001 View Artical
M. Mitzenmacher, "Compressed Bloom Filters", IEEE/ACM transactions on networking ,Vol.10 ,Issue 5 ,2002 View Artical
M.V. Ramakrishna, "A Simple Perfect Hashing Method for Static Sets", Proceedings of the Fourth International Conference ,Vol.23 ,Issue 1 ,1992 View Artical
H. Song and J. Lockwood, "Multi-pattern Signature Matching for Hardware Network Intrusion Detection Systems", IEEE Globecom ,Vol. ,2005 View Artical
C. Beckhoff, D. Koch, and J. Torresen, "The xilinx design language (xdl): Tutorial and use cases", IEEE Int.Workshop Reconfigurable Commu.-Centric Sy ,Vol. View Artical
A. Canis, J. Choi, M. Aldham, V. Zhang, A. Kammoona,J. H. Anderson, S. Brown, and T. Czajkowski, "Legup:High-level synthesis for fpga-based processor/accelerator systems", Proceedings of the 19th ACM/SIGDA international sy ,Vol. ,2011 View Artical
R. Chakraborty, I. Saha, A. Palchaudhuri, and G. Naik, "Hardware trojan insertion by direct modification of fpga configuration bitstream ,Vol.30 ,2013 View Artical
R. Karri, J. Rajendran, K. Rosenfeld, and M. Tehranipoor, "Trustworthy hardware: Identifying and classifying hardware trojans", Computer ,Vol.43 ,Issue 10 ,2010 View Artical
A. Moradi, A. Barenghi, T. Kasper, and C. Paar, "On the vulnerability of fpga bitstream encryption against power analysis attacks: Extracting keys fr", Proc. 18th ACM Conf. Comput.Commun. Security ,Vol. ,2011 View Artical
J.-B. Note and E. Rannaud,, "From the bitstream to the netlist ,Vol.8 ,2008 View Artical
M. Potkonjak, "Synthesis of trustable ics using untrusted cad tools", Design Automation Conference (DAC) ,Vol. ,2010 View Artical
J. Rilling, D. Graziano, J. Hitchcock, T. Meyer, X. Wang, P. Jones, and J. Zambreno, "Circumventing a ring oscillator approach to fpga-based hardware trojan detection", Computer Design (ICCD) ,Vol.43 ,Issue 10 ,2011 View Artical
H. Salmani and M. Tehranipoor, "Analyzing circuit vulnerability to hardware trojan insertion at the behavioral level", Defect and Fault Tolerance in VLSI and Nanotechnol ,Vol. ,Issue 25-Oct ,2013 View Artical
M. Tehranipoor and F. Koushanfar, "A survey of hardware trojan taxonomy and detection", IEEE Des ,Vol.27 ,Issue 1 ,2010 View Artical
J. X. Zheng, E. Chen, and M. Potkonjak, "A benign hardware trojan on fpga-based embedded systems", Field Programmable Logic and Applications (FPL) ,Vol.47 ,Issue 6 ,2012 View Artical
Z. K. Baker and V. K. Prassanna, "A Computationally Efficient Engine for Flexible Intrusion Detection", IEEE transactions on very large scale integration ,Vol.13 ,Issue 10 ,2005 View Artical
S. Dharmapurikar, P. Krishnamurthy, T. Sproull, J. Lockwood, "Deep Packet Inspection using Parallel Bloom Filters Bloom Filters : A Tutorial", Analysis, and Survey by James Blustein and Amal El ,Vol.13 ,Issue 7 ,1970 View Artical
J. W. Lockwood, N. Naufel, J. S. Turner, and D. E. Taylor, "Reprogrammable Network PacketProcessing on the Field Programmable Port Extender (FPX)", International Symposium on Field Programmable Gate ,Vol.10 ,Issue ,2001 View Artical
M. Mitzenmacher, "Compressed Bloom Filters", IEEE/ACM transactions on networking ,Vol.10 ,Issue 5 ,2002 View Artical
M.V. Ramakrishna, "A Simple Perfect Hashing Method for Static Sets", Proceedings of the Fourth International Conference ,Vol.23 ,Issue 1 ,1992 View Artical
